Open AccessDesign and implementation of a novel nine‐level MT‐MLI with a self‐voltage‐balancing switching technique
Author(s) -
Naik Banavath Shiva,
Suresh Yellasiri,
Venkataramanaiah Jammala,
Panda Anup Kumar
Publication year - 2019
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2018.6119
Subject(s) - capacitor , voltage , controller (irrigation) , computer science , pulse width modulation , switched capacitor , topology (electrical circuits) , matlab , electronic engineering , inverter , electronic circuit , electrical engineering , control theory (sociology) , engineering , control (management) , agronomy , artificial intelligence , biology , operating system
In this study, a novel nine‐level modified T‐type multilevel inverter (MT‐MLI) with a simple capacitor balancing technique is proposed. The proposed MT‐MLI circuit can generate higher levels with a single DC source and the minimum number of switching components. Each phase of the proposed topology contains ten switches and one flying capacitor (FC). The DC source voltage is divided into two parts with the help of capacitors. Phase disposition‐sine pulse‐width modulation technique is employed to regulate the DC‐link capacitors and FC voltages. To reduce the control complexity of FC‐based circuits, quarter‐cycle selector is introduced to control the FC voltage within the given half fundamental cycle using redundant states, so an external capacitor charging setup is not required. Furthermore, to highlight the potential merits of the proposed MT‐MLI, the comparison is made among state‐of‐the‐art MLIs. Simulation verification of the MT‐MLI is done using MATLAB/Simulink, and then hardware verifications are done using the laboratory prototype setup with Opal‐RT controller. Finally, adequate results are presented to validate the proposed MT‐MLI.