
Analysis of drain current saturation behaviour in GaN polarisation super junction HFETs
Author(s) -
Unni Vineet,
Long Hong Yao,
Yan Hongyang,
Nakajima Akira,
Kawai Hiroji,
Sankara Narayanan Ekkanath Madathil
Publication year - 2018
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2018.5583
Subject(s) - materials science , gallium nitride , saturation (graph theory) , transistor , optoelectronics , saturation current , heterojunction , current (fluid) , power semiconductor device , current density , engineering physics , voltage , electrical engineering , nanotechnology , engineering , physics , mathematics , layer (electronics) , combinatorics , quantum mechanics
The magnitude of saturation current in a power device significantly impacts its short‐circuit capability. In conjunction with the unprecedented miniaturisation that gallium nitride (GaN) offers, there is a compelling rationale to examine this critical parameter in GaN transistors for thermally stable and reliable power converter applications. This study presents a comprehensive analysis of the physical behaviour that yields intrinsically low drain current saturation in GaN polarisation super junction heterojunction field‐effect transistors (PSJ HFETs). The analysis in this work has been performed using electrical characterisation data of conventional and PSJ HFETs, supported by physics‐based two‐dimensional device simulations. Insight is gained on the differing device architecture‐dependent mechanisms that determine the magnitude of drain current density in both types of devices when biased in the saturation region.