Open AccessReliability and energy sharing analysis of a fault‐tolerant multilevel inverter topology
Author(s) -
Jalhotra Manik,
Sahu Lalit Kumar,
Gautam Shivam Prakash,
Gupta Shubhrata
Publication year - 2019
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2018.5452
Subject(s) - reliability (semiconductor) , photovoltaic system , waveform , fault tolerance , topology (electrical circuits) , reliability engineering , network topology , capacitor , inverter , fault (geology) , power (physics) , voltage , computer science , engineering , electronic engineering , electrical engineering , computer network , physics , quantum mechanics , seismology , geology
Photovoltaic (PV) systems, especially which are installed in the remote areas, stand in need for a highly reliable system. A high failure rate of the semiconductor switches and capacitors yields a very low reliability of the inverters used in the PV system. Conventional two‐level inverters are replaced by multilevel inverters (MLIs) to effectively improve the output quality waveform. However, MLIs incorporate a high device count in their architecture which further impairs the reliability of the PV system. Recent research has focused on developing fault‐tolerant MLI topologies with reduced device count. However, the number of active devices and power losses, factors which are many of the times overlooked, are key in determining the reliability of the inverter. Here, the reliability of a novel fault‐tolerant MLI topology is evaluated bearing in mind the effect of power losses on the junction temperature. Equal (or best) voltage source utilisation characteristics help in maintaining the uniform charge of the batteries. The concept of reliability is evaluated mathematically. The fault tolerance and even source utilisation of the proposed topology is verified through the obtained experimental results.