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Reduced switch‐count structure for symmetric multilevel inverters with a novel switched‐DC‐source submodule
Author(s) -
Nasiri Avanaki Hossein,
Barzegarkhoo Reza,
Zamiri Elyas,
Yang Yongheng,
Blaabjerg Frede
Publication year - 2019
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2018.5089
Subject(s) - topology (electrical circuits) , voltage , power (physics) , computer science , converters , electronic engineering , electrical engineering , engineering , physics , quantum mechanics
The aim of this study is to present a new cost effective topology for Symmetric multilevelinverters (SMLIs) configurations, which can generate a great number of outputvoltage levels with a least of switching devices. The proposed structurecontains a novel switched‐dc‐source (SDCS) sub‐module that can produce threepositive output voltage levels with a contribution of four equal dc voltagesources, two unidirectional, and one bi‐directional power switches. Accordingly,to create a uniform staircase output voltage with multiple levels, the proposedSDCS sub‐module is integrated into a new design. Therefore, a new family ofreduced switch‐count (RSC)‐SMLIs is derived, which is capable of generating atleast 13‐ and 15‐level output voltages using only ten power switches and ninegate drivers. Furthermore, when employing several of the proposed SDCSsub‐modules in series, a new generalised RSC‐SMLI topology is obtained.Comparisons with prior‐art SMLIs structures are done, which also highlights thebeneficial potential of the proposed topology. To demonstrate the superiorperformance of the proposed topology, several simulation and experimentalresults have been provided.

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