Open AccessReduced number of auxiliary H‐bridge power cells for post‐fault operation of three phase cascaded H‐bridge inverter
Author(s) -
Aleenejad Mohsen,
Jafarishiadeh Seyyedmahdi,
Mahmoudi Hamid,
Ahmadi Reza
Publication year - 2019
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2018.5073
Subject(s) - converters , h bridge , fault tolerance , fault (geology) , inverter , power (physics) , topology (electrical circuits) , bridge (graph theory) , computer science , voltage , power electronics , modulation (music) , event (particle physics) , electronic engineering , engineering , control theory (sociology) , electrical engineering , reliability engineering , control (management) , physics , medicine , quantum mechanics , artificial intelligence , seismology , geology , acoustics
This work offers a fault‐tolerant strategy that uses a combination of a hardware‐based and a control‐based fault‐tolerant methods for multilevel (ML) cascaded H‐bridge (CHB) converters. The possibility of a switch failure in an ML converter is higher than a conventional inverter due to the increased number of power electronics switches. Although the event of a single switch failure is more likely, nonetheless, the fault tolerant operation of a ML converter with two or more faulty switches needs to be addressed as well. This article first offers a hardware topology that can bypass the faulty H‐bridge cell and replace it with an auxiliary cell, in the event of a single switch failure. Then, it enhances the hardware topology with a modulation‐based fault‐tolerant method for the event of more than one defective switch. Using this strategy, the CHB converter will be able to operate with maximum achievable output voltage in the post‐fault condition. Experimental results are presented for a seven‐level CHB converter for the validation of the theoretical outcomes.