Open AccessCapacitor static voltage balance based on auxiliary‐power supply pulse width control for MMC
Author(s) -
Luo Longfei,
Zhang Yanbin,
Jia Lixin,
Yang Ningning,
Yang Lixia,
Zhang Huihui
Publication year - 2018
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2017.0672
Subject(s) - capacitor , pulse width modulation , voltage , electronic circuit , resistor , modular design , signal (programming language) , electronic engineering , electrical engineering , power (physics) , engineering , computer science , physics , quantum mechanics , programming language , operating system
As one of the most potential converter topologies, modular multilevel converter (MMC) is widely used in high‐voltage direct current (HVDC) transmission systems. The capacitor static voltage imbalance during HVDC system start‐up stage has become a key issue. This study presents a new capacitor static voltage balance method based on auxiliary‐power supply (APS) pulse width control for MMC. The control signal of APS can be generated by comparing the modulation signal for voltage closed‐loop control with the carrier signal with fixed frequency. An AND gate circuit is used to improve the APS Metal oxide semiconductor (MOS) driving circuits. Based on these circuits, the input current of APS can be regulated, and the capacitor voltage can be controlled. Since only the inherent sub‐module (SM) APS is needed in this method, it has low hardware costs. The control strategy in this method is simple, and it has no restrictions on the SM number. This determines that the presented method has a wider range of application. Furthermore, the value of equalising resistor is increased, and the losses of SM and MMC are reduced in this method. Experimental results from the laboratory prototype verify the effectiveness of the presented method.