
Low‐primary current and wide hold‐up time DC–DC converter: analysis and implementation
Author(s) -
Lin BorRen
Publication year - 2018
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2017.0621
Subject(s) - capacitor , inductance , electronic circuit , voltage , series and parallel circuits , electrical engineering , inductor , pulse width modulation , electromagnetic coil , forward converter , boost converter , materials science , control theory (sociology) , computer science , engineering , control (management) , artificial intelligence
A soft‐switching direct current (DC) to DC converter is studied in this study to achieve benefits: (i) low‐primary current (circulating current) loss, (ii) low‐switching loss, (iii) low‐output filter inductance, and (iv) wide hold‐up time. On primary side of the studied converter, a phase‐shift pulse‐width modulation full‐bridge (FB) circuit and a half‐bridge (HB) circuit using same lagging‐leg switches of FB circuit to reduce the switching losses at light load. Resonant capacitor is adopted on primary side of FB circuit to lessen primary current at freewheeling state so as to reduce conduction losses. The output sides of HB and FB circuits are series connection to create two positive voltages instead of one positive voltage on conventional FB circuit so as to reduce primary current and output filter inductance. To extend hold‐up time and avoid using large size of input capacitor when utility power is off, the auxiliary windings are used on secondary side to achieve higher‐voltage gain. To verify the performance and effectiveness of the studied converter, the operational principle and equivalent circuits are explained and analysed in detail and a 1440 W prototype is constructed and tested for 300–400 V input and 48 V output applications.