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Development process and analytical method of the pole‐to‐pole DC fault in the MMC‐MVDC system
Author(s) -
Li BoTong,
Liu YiChao,
Li Bin,
Zhang YunKe,
Jia JianFei,
Jing FangJie
Publication year - 2017
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2017.0314
Subject(s) - correctness , fault (geology) , control theory (sociology) , modular design , equivalent circuit , voltage , engineering , direct current , voltage drop , process (computing) , electronic engineering , computer science , electrical engineering , algorithm , control (management) , artificial intelligence , seismology , geology , operating system
Rapid rise of current and sudden drop of voltage at the DC side caused by a pole‐to‐pole DC fault in the modular multi‐level converter medium voltage direct current (MMC‐MVDC) transmission system seriously threaten the normal operation of the system. This study analyses the development process of the fault and studies the analytical method of the fault transient process. The study is structured as follows: the pre‐blocking equivalent circuit model is first proposed, involving the impact of the AC system and the dynamic switching of MMC submodules. Then the solving method of the state equations of fault current in each part of the converter is studied. Combined with the equivalent circuit model after the MMC is blocked, the solving method of state equations of fault current is proposed, with the non‐linearity of diodes considered. Finally, an MMC‐MVDC system model is built in PSCAD/EMTDC and fault simulations are carried out, verifying the correctness of the equivalent circuit and the accuracy of the fault current solving method.

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