Open AccessCascaded multilevel inverter based on symmetric–asymmetric DC sources with reduced number of components
Author(s) -
Saeedian Meysam,
Adabi Jafar,
Hosseini Seyyed Mehdi
Publication year - 2017
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2017.0039
Subject(s) - pulse width modulation , voltage , series and parallel circuits , topology (electrical circuits) , polarity (international relations) , voltage source , modular design , h bridge , harmonic , inverter , power (physics) , diode , electronic engineering , modulation (music) , computer science , electrical engineering , control theory (sociology) , engineering , physics , control (management) , quantum mechanics , artificial intelligence , biology , cell , acoustics , genetics , operating system
This study presents a new module for multilevel inverters with reduced components. Each module produces 25 levels using four asymmetrical DC voltage sources (two 1 V DC and two 5 V DC sources) and 10 semiconductor switches. A significant advantage of the suggested module is its potentiality in producing voltage levels with negative polarity without any end side H‐bridge inverter. Therefore, switches with lower voltage ratings are used in its structure. Series connection of the proposed structure leads to a modular topology which produces more voltage levels using reasonable number of switches, gate driver circuits, power diodes and less DC voltage sources. These advantages are analysed by comparing this structure with other state‐of‐the‐art topologies. Selective harmonic elimination pulse width modulation (SHE‐PWM) scheme is used to achieve output voltage with high quality. To produce all voltage levels, two algorithms are proposed to determine DC voltage sources magnitude. The accuracy of the suggested module performance in producing all voltage levels is verified by simulation and experimental results.