Open AccessSingle‐phase hybrid cascaded H‐bridge and diode‐clamped multilevel inverter with capacitor voltage balancing
Author(s) -
Castillo Richard,
Diong Bill,
Biggers Preston
Publication year - 2018
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2017.0009
Subject(s) - inverter , total harmonic distortion , capacitor , h bridge , modulation index , topology (electrical circuits) , voltage , waveform , control theory (sociology) , modulation (music) , electronic engineering , engineering , diode , computer science , electrical engineering , physics , control (management) , artificial intelligence , acoustics
Diode‐clamped and cascaded H‐bridge multilevel inverters are two of the main multilevel inverter topologies; each has its distinct advantages and drawbacks. Regarding the latter, cascaded H‐bridge inverters require multiple separate dc sources, whereas (semi‐active) diode‐clamped inverters contain capacitors that require a means to balance their voltages. This paper investigates a hybrid‐topology inverter, comprising a single‐phase five‐level semi‐active diode‐clamped inverter and a single‐phase cascaded H‐bridge inverter with their outputs connected in series, as one way to mitigate the drawbacks of each topology. The proposed control scheme for this inverter operates the switches at fundamental frequency to achieve capacitor voltage‐balancing while keeping the switching losses low. Moreover, the step‐angles are designed for the 13‐level and 11‐level output voltage waveform cases (as examples) for a fixed modulation index to achieve optimal total harmonic distortion. Furthermore, the scheme also achieves capacitor voltage‐balancing for modulation indices that are close to the optimal modulation index, and for a wide range of load power factors, albeit at the cost of increased output voltage distortion. Simulation results are presented to help explain the processes of capacitor recharging and voltage‐balancing, while experimental results are shown as verification of the expected behaviour of this inverter and the proposed control scheme.