Open AccessReduced‐switch SCALDO: an extra low‐frequency DC–DC converter technique for VRM applications
Author(s) -
Wickramasinghe Thilini,
Kularatihal,
SteynRoss Alistair
Publication year - 2017
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2016.0420
Subject(s) - linear regulator , low dropout regulator , slew rate , electrical engineering , inductor , converters , voltage regulator , electromagnetic interference , voltage , electronic engineering , engineering , power (physics) , low voltage , noise (video) , dropout voltage , topology (electrical circuits) , computer science , regulator , physics , biochemistry , chemistry , quantum mechanics , artificial intelligence , image (mathematics) , gene
State‐of‐the‐art microprocessors require very low DC‐voltages at sub‐1 V levels. Many processors draw high‐current at low voltages and require low‐noise DC‐power rails. Switched‐mode power supply (SMPS) topologies are the common approach to design voltage regulator modules (VRMs). Fast operations of switches in SMPSs allow the use of smaller inductors but ultimately result in radio frequency and electromagnetic interference issues. Compared to SMPSs, linear regulators have lower noise, high quality DC output, and faster response to the load high‐current slew rates; however, with the serious disadvantage of low efficiency. Supercapacitor assisted low‐dropout (SCALDO) regulator is a technique to achieve high end‐to‐end efficiency (ETEE) for linear regulator‐based converters. Though, the switch‐operation frequency is extremely low, number of switches required for SCALDO configuration is three times larger than that of supercapacitors. Reduced‐switch SCALDO (RS‐SCALDO) is a topological variation of SCALDO that requires fewer switches. By designing an alternately operated high‐current LDO pair, RS‐SCALDO can handle high load currents, allowing development of a linear VRM. This study presents a proof of concept prototype of 3.5‐to‐1.5 V RS‐SCALDO for a maximum 5 A load with digitally adjustable output voltages. The prototype achieved an ETEE better than 80%, and required half the switch count of an equivalent SCALDO circuit.