Open AccessHigh voltage gain half‐bridge quasi‐switched boost inverter with reduced voltage stress on capacitors
Author(s) -
Asl Elias Shokati,
Babaei Ebrahim,
Sabahi Mehran
Publication year - 2017
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2016.0291
Subject(s) - inverter , topology (electrical circuits) , voltage , capacitor , grid tie inverter , control theory (sociology) , inrush current , network topology , computer science , electronic engineering , engineering , electrical engineering , maximum power point tracking , transformer , control (management) , artificial intelligence , operating system
In this study, an improved topology of half‐bridge switched boost inverter with low voltage stress on capacitors is proposed. The proposed half‐bridge quasi‐switched boost inverter, in comparison with the half‐bridge Z‐source inverter with two Z‐networks, has less passive components. Moreover, the proposed topology generates high voltage gain comparing with the conventional topologies and has stable operation. Producing zero voltage level at the output is the other advantage of the proposed inverter, in comparison with the conventional half‐bridge inverter. The small‐signal model and steady‐state analysis of the proposed inverter in different operating modes are given. Moreover, signal flow graph using small‐signal analysis and design considerations are derived. In addition, switching pattern for the proposed inverter is presented and power losses are calculated. A comprehensive comparison is done between the proposed topology and conventional inverters from different points of view such as number of components, volume, inrush current, tolerance of shoot‐through and so on. Finally, the simulation and experimental results are given to demonstrate dynamic response, effect of undesirable shoot‐through and the accuracy of the given theories.