Open AccessNeutral‐point voltage deviation control for three‐level inverter‐based shunt active power filter with fuzzy‐based dwell time allocation
Author(s) -
Hoon Yap,
Radzi Mohd Amran Mohd,
Hassan Mohd Khair,
Mailah Nashiren Farzilah
Publication year - 2017
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2016.0240
Subject(s) - control theory (sociology) , inverter , dwell time , computer science , capacitor , voltage , robustness (evolution) , fuzzy logic , harmonics , pulse width modulation , matlab , electronic engineering , engineering , control (management) , electrical engineering , clinical psychology , chemistry , artificial intelligence , gene , operating system , medicine , biochemistry
Three‐level inverters have emerged as the main alternative to replace the use of standard two‐level inverters in current harmonics mitigation. Neutral‐point diode clamped (NPC) inverter is the most attractive candidate due to its robustness. However, the inherent neutral‐point voltage deviation problems have always been the most troublesome features of NPC inverter. Hence, voltage balancing of DC‐link capacitors is highly essential, where it is usually achieved through proper switching control. Space vector pulsewidth modulation is the most desirable switching scheme, where the voltage balancing control is mostly accomplished by decently allocating the dwell time for all the switching states. In this study, a fuzzy logic controller is incorporated to systematically control the dwell time allocation for all the switching states based on the instantaneous voltage of splitting DC‐link capacitors. The proposed method is called the fuzzy‐based dwell time allocation algorithm. To validate effectiveness and feasibility of the proposed algorithm, simulation work in MATLAB‐Simulink and experimental implementation utilising TMS320F28335 digital signal processor (DSP) are performed. Both simulation and experimental results are presented, confirming effectiveness of the proposed algorithm in reducing the inherent voltage deviation problems of NPC inverter to a minimum level.