Open AccessFault‐tolerant multilevel cascaded H‐bridge inverter using impedance‐sourced network
Author(s) -
Aleenejad Mohsen,
Ahmadi Reza
Publication year - 2016
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2016.0033
Subject(s) - fault (geology) , fault tolerance , converters , inverter , compensation (psychology) , voltage , electrical impedance , electronic engineering , voltage source , scheme (mathematics) , engineering , line (geometry) , equivalent impedance transforms , control theory (sociology) , modulation (music) , key (lock) , computer science , electrical engineering , reliability engineering , mathematics , control (management) , physics , psychology , mathematical analysis , geometry , computer security , artificial intelligence , seismology , acoustics , psychoanalysis , geology
This study proposes a fault‐tolerant scheme for an impedance‐sourced cascaded H‐bridge (CHB) converter that can fully restore the converter operation to the pre‐fault conditions without any hardware intervention. The proposed fault‐tolerant scheme has three key elements: a new quasi‐ z ‐source CHB converter, a modified modulation method for the introduced z ‐source CHB, and a modified implementation of the fundamental phase shift compensation (FPSC) method. In case of a fault on one of the inverter switches, the proposed fault‐tolerant scheme enables the z ‐source CHB to generate balanced line‐to‐line voltages with the same amplitude as the pre‐fault voltages, while evenly distributing an inevitable voltage stress increase over all converter switches. In this study, first a brief review of CHB converters and the FPSC method is provided. Then the proposed fault‐tolerant scheme is introduced. Finally, several experimental results from a prototype converter are provided to validate the operation of the proposed strategy.