Open AccessMultilevel converter with capacitor voltage actively balanced using reduced number of voltage sensors for high power applications
Author(s) -
Gao Congzhe,
Liu Xiangdong,
Liu Jingyun,
Guo Youguang,
Chen Zhen
Publication year - 2016
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2015.0073
Subject(s) - capacitor , electronic engineering , pulse width modulation , boost converter , converters , ćuk converter , buck–boost converter , voltage , engineering , buck converter , integrating adc , computer science , topology (electrical circuits) , control theory (sociology) , electrical engineering , control (management) , artificial intelligence
Capacitor voltage balance control has attracted increasing attention in the studies of cascaded multilevel converters and modular multilevel converters. This study proposes a novel multilevel converter topology based on diode clamped half‐bridge cascaded converter for medium/high voltage and high power applications. In this converter, capacitor voltage balancing using clamping diodes is achieved. Thus very little capacitor voltage control code has to be executed by the digital controller. Furthermore, only two voltage sensors are required for the capacitor voltage control, and the control scheme can be designed as simple as that of a two‐level converter. The phase shifted pulse width modulation (PWM) method is employed for the converter, and a control strategy for the converter utilised as a static Var generator is presented. The proposed converter and control strategy were simulated with PSIM. Experiments were also carried out with a laboratory prototype. Results showed that the proposed converter topology with capacitor voltage balancing could work effectively. The applied PWM and control method were also validated.