Open AccessDesign methodology for optimising a high insulation voltage insulated gate bipolar transistor gate driver signal transmission function
Author(s) -
Am Sokchea,
Lefranc Pierre,
Frey David
Publication year - 2015
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2014.0434
Subject(s) - transformer , electrical engineering , electronic engineering , electronics , transistor , gate driver , bipolar junction transistor , engineering , voltage
In this study, a design methodology for optimising a signal transmission function for high galvanic insulation (up to 30 kV) insulated gate bipolar transistor gate driver is proposed. The technology is based on a printed circuit board magnetic planar transformer with electronic circuits for excitation and reception. The objective of this study is to optimise the geometric elements of the transformer and its associated electronics devices with the help of a virtual prototyping tool. A bi‐objective problem of the overall system that leads to a Pareto front is presented. Several Pareto fronts’ results are obtained assuming different insulation layers thickness. The chosen transformer solution is justified and depends on the bi‐objective functions and the galvanic insulation level of the system. Moreover, the experimental results are compared with the simulation results. Finally, the comparisons between experimental and simulation results are proposed to lead to a conclusion of this methodology.