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Evaluation and analysis of transformerless photovoltaic inverter topology for efficiency improvement and reduction of leakage current
Author(s) -
Cha WooJun,
Kim KyuTae,
Cho YongWon,
Lee SungHo,
Kwon BongHwan
Publication year - 2015
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2014.0401
Subject(s) - inverter , photovoltaic system , topology (electrical circuits) , capacitor , network topology , electronic engineering , voltage , leakage (economics) , electrical engineering , computer science , engineering , economics , macroeconomics , operating system
In transfomerless photovoltaic (PV) grid‐connected inverter application, to reduce leakage current and to increase efficiency, many inverter topologies have been proposed. The method for increasing efficiency and reducing leakage current is evaluated and analysed in the present study. The operation of transfomerless PV inverter topologies with high‐performance such as full‐bridge, H5, H6, HERIC and paralleled‐buck topology is analysed to calculate switching losses, conduction losses and free‐wheeling losses. Device total losses for inverter topology are calculated according to the switching frequency and the output power. Also, a novel high‐frequency model of inverter topology is proposed using the leg voltage and high‐frequency equivalent circuit. The relation between the parasitic capacitor voltage and its leakage current is explained using the proposed high‐frequency model. Also, the magnitude of the high‐frequency voltage in the parasitic capacitor is derived mathematically. Efficiency of the several inverter topology according to the output power is compared and the leakage current is analysed using a novel high‐frequency model. Finally, the efficiency and leakage current analysis are verified by simulation tool and 3 kW prototype.

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