Open AccessLow‐frequency dc bus ripple cancellation in single phase pulse‐width modulation inverters
Author(s) -
Mahadeva Iyer Vishnu,
John Vinod
Publication year - 2015
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2014.0320
Subject(s) - ripple , pulse width modulation , electronic engineering , topology (electrical circuits) , pulse frequency modulation , filter (signal processing) , computer science , control theory (sociology) , engineering , frequency modulation , electrical engineering , amplitude modulation , voltage , radio frequency , control (management) , artificial intelligence
This study presents a topology for a single‐phase pulse‐width modulation (PWM) converter which achieves low‐frequency ripple reduction in the dc bus even when there are grid frequency variations. A hybrid filter is introduced to absorb the low‐frequency current ripple in the dc bus. The control strategy for the proposed filter does not require the measurement of the dc bus ripple current. The design criteria for selecting the filter components are also presented in this study. The effectiveness of the proposed circuit has been tested and validated experimentally. A smaller dc‐link capacitor is sufficient to keep the low‐frequency bus ripple to an acceptable range in the proposed topology.