Open AccessNovel carrier‐based hybrid pulse width modulation method for cascaded capacitor‐clamp multilevel inverter
Author(s) -
Kim KiMok,
Choi WonShik,
Park KiHyeon
Publication year - 2014
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2014.0035
Subject(s) - pulse width modulation , capacitor , electronic engineering , modulation (music) , inverter , materials science , pulse (music) , clamper , computer science , engineering , electrical engineering , voltage , physics , acoustics
This study presents a new carrier‐based hybrid pulse width modulation (PWM) Method for the cascaded capacitor‐clamp multilevel inverter (CCCMLI), which combines the benefits of a new alternative level‐shifted carrier PWM and a phase‐shifted carrier PWM. For modulating the CCCMLI, the phase disposition sub‐harmonic PWM was first proposed, but does not show good performances in an even load sharing between inverter cells connected in series, flying‐capacitor voltage balancing and output waveform quality. On the other hand, a proposed PWM method enables to achieve a balanced load sharing between cascaded cells even at low amplitude modulation indices as well as the excellent voltage balancing control of the flying‐capacitors with a much smaller voltage ripple and the good harmonic characteristics in output waveforms. The proposed modulation is verified through both simulation and field‐programmable gate array (FPGA) based experimental results.