Open AccessParasitic capacitance effect on the performance of two‐phase switched‐capacitor DC–DC converters
Author(s) -
Wong OiYing,
Wong Hei,
Tam WingShan,
Kok ChiWah
Publication year - 2015
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2013.0901
Subject(s) - switched capacitor , capacitance , capacitor , parasitic capacitance , decoupling capacitor , spice , converters , voltage , electrical engineering , electronic engineering , topology (electrical circuits) , engineering , physics , electrode , quantum mechanics
The effects of parasitic capacitances on the performances of three common switched‐capacitor DC–DC converters operating in the complete charge transfer case were studied with matrix calculation. The study was conducted by describing the top‐ and bottom‐plate parasitic capacitances of a capacitor network in matrix form; these resulted matrices were then employed in some existing solutions so that not only the steady‐state performance, but also the dynamic‐state performance of a two‐phase switched‐capacitor DC–DC converter could be evaluated. The proposed method was validated with SPICE simulation and was used to study the final output voltage, start‐up time and start‐up energy consumption of an exponential, a Fibonacci and a linear converter under different parasitic capacitance effects.