Open AccessCascaded three‐phase pulse‐width modulated switched voltage source inverter
Author(s) -
Odeh Charles I.,
Agu Vincent N.,
Goshwe Nentawe
Publication year - 2014
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2013.0704
Subject(s) - pulse width modulation , inverter , total harmonic distortion , control theory (sociology) , voltage , topology (electrical circuits) , waveform , power (physics) , modulation (music) , computer science , electronic engineering , engineering , physics , electrical engineering , acoustics , control (management) , quantum mechanics , artificial intelligence
A cascaded three‐phase pulse‐width modulated (PWM) switched voltage source inverter topology is proposed. Each of the two cascaded units in a phase‐leg is an H‐bridge, whose switch legs are separated by a switched capacitor and a diode. Three upper H‐bridges in this inverter configuration have separate dc inputs; whereas the lower three H‐bridges share a common dc input. A single‐carrier, multilevel PWM scheme is employed to generate the gating signals for the power switches. The implemented modulation scheme is hybridised to enable the output voltage of the proposed inverter configuration inherit the features of switching‐loss reduction from fundamental PWM, and good harmonic performance from multiple sinusoidal PWM. A sequential switching scheme is embedded with the already employed hybrid modulation in order to overcome unequal switching losses. Furthermore, a simple base PWM circulation scheme is also introduced to get a resultant sequential switching hybrid PWM circulation that balances power dissipation among the two cascaded power modules. The proposed inverter configuration was subjected to an R–L load. Fast Fourier transform analyses of the output voltage waveforms gave total harmonic distortion value of 12.64%. Simulations and experiments are carried out on a 4.89 kW rated prototype of the proposed inverter.