Open AccessNovel multilevel inverter topologies for medium and high‐voltage applications with lower values of blocked voltage by switches
Author(s) -
Shalchi Alishah Rasoul,
Nazarpour Daryoosh,
Hosseini Seyed Hossein,
Sabahi Mehran
Publication year - 2014
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2013.0670
Subject(s) - network topology , topology (electrical circuits) , cascade , voltage , inverter , high voltage , diode , power (physics) , computer science , insulated gate bipolar transistor , electronic engineering , engineering , electrical engineering , physics , computer network , quantum mechanics , chemical engineering
In this study, novel multilevel inverter structures for medium and high‐voltage applications are proposed. The proposed topologies can generate a great number of output voltage levels with more advantages. Firstly, a new symmetric cascade topology is presented which can be used in medium voltage applications. Then, based on the proposed symmetric structure, a new hybrid structure is recommended. The proposed hybrid structure can be used in high‐voltage applications. The comparison between the proposed symmetric topology with conventional symmetric cascade topology and other non‐conventional symmetric topologies are presented in terms of the number of insulated gate bipolar transistors (IGBTs), anti‐ parallel diodes, gate drivers and blocked voltage by switches. Moreover, the proposed topologies can be used in bidirectional power flow applications. The validity of the proposed multilevel inverter structures are veried with experimental and simulation results.