Open AccessOptimal selective harmonic elimination for cascaded H‐bridge‐based multilevel rectifiers
Author(s) -
Marzoughi Alinaghi,
Imaneini Hossein
Publication year - 2014
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2013.0044
Subject(s) - harmonics , rectifier (neural networks) , total harmonic distortion , waveform , control theory (sociology) , converters , harmonic , voltage , h bridge , modulation index , pulse width modulation , distortion (music) , power (physics) , topology (electrical circuits) , electronic engineering , computer science , engineering , electrical engineering , physics , acoustics , control (management) , amplifier , stochastic neural network , cmos , artificial intelligence , quantum mechanics , machine learning , recurrent neural network , artificial neural network
In medium‐voltage medium‐ and high‐power converters, it is of great importance to reach high‐quality waveforms with low switching frequency. In active rectifiers, both converter's ac‐side harmonics and grid preexisting distortions affect the quality of the input current, which according to the existing standards is restricted from both the individual harmonics amplitude and total harmonic distortion point of view. The well known selective harmonic elimination pulse‐width modulation technique is able to completely eliminate certain harmonics from the ac‐side voltage of the converter, and as a result increases the quality of the input current. In this study, an optimal selective harmonic elimination control strategy is introduced for cascaded H‐bridge (CHB) rectifiers. By fully manipulating the ac‐side waveform of the rectifier, maximum number of harmonics is eliminated for a specific number of switching transitions. Moreover, this method can be easily extended for any number of H‐bridge cells and it uses only one lookup table for the whole interval of modulation index. Also using an effective voltage balancing technique, dc‐link voltages are balanced to the reference value and the rectifier does not encounter any difficulty under equal or non‐equal loads conditions. Using this method, the size of the bulky line‐side filters can be reduced which leads to lower overall cost of implementation. To prove the feasibility of the proposed scheme, simulation and experimental results for a seven‐level CHB‐based rectifier are reported.