Open AccessStatic performance and parasitic analysis of tapped‐inductor converters
Author(s) -
Shi Zhang Hai,
Cheng Ka Wai Eric,
Ho Siu Lau
Publication year - 2014
Publication title -
iet power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.637
H-Index - 77
eISSN - 1755-4543
pISSN - 1755-4535
DOI - 10.1049/iet-pel.2012.0760
Subject(s) - inductor , converters , electronic engineering , diode , transistor , transformer , electrical engineering , boost converter , voltage , electronic circuit , energy conversion efficiency , engineering
Tapped‐inductor provides the property of wider voltage conversion range similar to an auto‐transformer and can be integrated to a switched‐mode power converter to enhance the power conversion efficiency. Its low component count has attracted applications with extreme voltage conversion ratios. Circuit family is presented and a general tapping concept for diode, transistor or both has been described. Its boost converter version is used as an example for the study. Detailed comparisons between tapped‐inductor boost and conventional boost are carried out, which include the comparison of voltage gain, component stress and efficiency with the presence of the parasitic components. Experimental results present solid verification of the analysis of performance of tapped‐inductor boost converter under extreme conversion ratios. The proposed study has introduced formulations for both transistor and diode tapping and can be extended to other tapped‐inductor DC–DC converters as a family of circuits, and thus provides an understanding of the effect of the parasitic components that affect the efficiency under extreme conversion ratio.