Open AccessCompact high‐linearity, high‐efficiency complementary metal–oxide–semiconductor power amplifier with post‐distortion lineariser for wireless local area network and Wireless Gigabit Alliance applications
Author(s) -
Lin KueiCheng,
Chiou HwannKaeo,
Ko ChunLin,
Wu PoChang,
Tsai HannHuei,
Juang YingZong
Publication year - 2016
Publication title -
iet microwaves, antennas and propagation
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.555
H-Index - 69
eISSN - 1751-8733
pISSN - 1751-8725
DOI - 10.1049/iet-map.2015.0530
Subject(s) - amplifier , cmos , materials science , electrical engineering , gigabit , power gain , dbm , linearity , gain compression , rf power amplifier , optoelectronics , electronic engineering , engineering
This study proposes a post‐distortion linearisation technique for 5 and 60 GHz complementary metal–oxide–semiconductor (CMOS) power amplifiers (PAs). The technique improves the output 1 dB gain compression point (OP 1dB ) and power‐added efficiency (PAE) of the PA when the lineariser is turned on. The 5 GHz PA that is fabricated in tsmc TM 0.18 μm CMOS achieves a 16.3 dB gain, a 20 dBm OP 1dB and a 32.6% PAE. The linearised 5 GHz PA improves the OP 1dB and PAE by 2.3 dB and 3.2% as compared to the PA without lineariser. The difference between the OP 1dB and saturated power ( P sat ) is <0.2 dB. The 60 GHz PA was implemented in a 90 nm CMOS process with a chip area of 0.57 mm 2 . The PA achieves a 14.8 dB gain, a 16.8 dBm OP 1dB with a 16.3% PAE and a 15 GHz 3 dB bandwidth. The power difference between the OP 1dB and P sat is <0.3 dB. The linearised 60 GHz PA improves the OP 1dB and PAE by 3.2 dB and 5.8% as compared to the PA without lineariser.