Open AccessArrester‐less DC fault current limiter based on pre‐charged external capacitors for half‐bridge modular multilevel converters
Author(s) -
Elserougi Ahmed A.,
Massoud Ahmed M.,
Ahmed Shehab
Publication year - 2017
Publication title -
iet generation, transmission and distribution
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.92
H-Index - 110
eISSN - 1751-8695
pISSN - 1751-8687
DOI - 10.1049/iet-gtd.2016.0542
Subject(s) - converters , fault current limiter , capacitor , modular design , current limiting , current (fluid) , lightning arrester , limiter , electrical engineering , surge arrester , half bridge , bridge (graph theory) , materials science , computer science , electronic engineering , engineering , voltage , physics , electric power system , power (physics) , quantum mechanics , operating system , medicine
The half‐bridge modular multilevel converter (HB‐MMC) is one of the most promising topologies for high‐voltage direct current (HVDC) systems. Unlike full‐bridge MMC (FB‐MMC) and clamp double sub‐module MMC (CDSM‐MMC), HB‐MMCs are defenceless against DC side faults. Different types of DC circuit breakers (DC CBs) assisted with arrester banks/damping resistors such as solid‐state CB and hybrid DC CBs can be used to interrupt the DC fault current. Arrester banks are used to protect against overvoltage after interrupting the fault current and in turn to demagnetise the circuit inductors. The main disadvantage of the arresters is that they forcibly break apart when they are overloaded. In this study, an arrester‐less fault current limiter is proposed for HB‐MMC configuration, which provides an opposing voltage during the DC side fault. This is achieved by inserting external pre‐charged capacitors in the DC current path during the fault. The selection of these external capacitors, their suitable initial voltages, and their charging stations are also presented in this study. A comparison between the proposed scheme and the CDSM‐MMC has been held as well. The proposed protection scheme is assessed using a simulation study for a point‐to‐point nine‐level HB‐MMC‐based HVDC system.