Open AccessReal‐time digital multi‐function protection system on reconfigurable hardware
Author(s) -
Wang Yifan,
Dinavahi Venkata
Publication year - 2016
Publication title -
iet generation, transmission and distribution
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.92
H-Index - 110
eISSN - 1751-8695
pISSN - 1751-8687
DOI - 10.1049/iet-gtd.2015.0718
Subject(s) - digital protective relay , field programmable gate array , emulation , relay , computer science , hardware emulation , virtex , embedded system , computer hardware , digital signal processing , protective relay , signal processing , power (physics) , physics , quantum mechanics , economics , economic growth
This study proposes a multi‐function power system protective relay hardware design built with various functional hardware processing cores on the field programmable gate array (FPGA). This practical and systematic method lends itself to a paralleled and pipelined hardware emulation of individual signal processing and protection components. Detailed emulation designs are presented for the following protective relays: distance, directional overcurrent, voltage, and frequency protection. The necessary signal processing functions required to operate these relays are also emulated, allowing the protection system to be stand‐alone and fed with instantaneous fault data. Real‐time experimental results are presented to verify the functions of the target hardware relay on the Xilinx ® Virtex‐7 FPGA. Case studies provide the efficacy of the multi‐function relay design in terms of accuracy, latency, and resource consumption.