Open AccessFast and robust software‐based digital phase‐locked loop for power electronics applications
Author(s) -
Özdemir Ayhan,
Yazici İrfan,
Vural Cabir
Publication year - 2013
Publication title -
iet generation, transmission and distribution
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.92
H-Index - 110
eISSN - 1751-8695
pISSN - 1751-8687
DOI - 10.1049/iet-gtd.2013.0041
Subject(s) - phase locked loop , robustness (evolution) , computer science , software , jump , electronic engineering , power electronics , voltage , harmonic , electronics , digital signal processor , digital signal processing , computer hardware , engineering , jitter , electrical engineering , physics , quantum mechanics , biochemistry , chemistry , gene , programming language
In this study, a fast and fully software‐based algorithm for digital phase‐locked loop (PLL) is proposed via a new hybrid approach in software and hardware by using an advanced digital signal processor architecture. The proposed algorithm is robust against line disturbances such as phase‐angle jump, voltage sag, third harmonic injection, multi‐zero crossing and step change in frequency at the input voltage. Performance and robustness of the proposed method are investigated through experimental studies. Furthermore, it is compared with three different PLL algorithms in detail to show its superiority over existing methods.