Open AccessModelling and simulation of channel power delay profile under indoor stair environment
Author(s) -
Yu Yu,
Liu Yang,
Lu WenJun,
Jin Shi,
Zhu HongBo
Publication year - 2017
Publication title -
iet communications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.355
H-Index - 62
eISSN - 1751-8636
pISSN - 1751-8628
DOI - 10.1049/iet-com.2015.1004
Subject(s) - delay spread , power delay profile , computer science , multipath propagation , channel (broadcasting) , nakagami distribution , simulation , root mean square , power (physics) , algorithm , electronic engineering , fading , telecommunications , engineering , electrical engineering , physics , quantum mechanics
An empirical stochastic discrete tapped delay line (DTDL) power delay profile (PDP) model is presented. It is used for characterising the multipath effects under indoor stair environment. In this model, the amplitude at each DTDL tap and stair step follows the Nakagami distribution. Its scale parameters are lognormally distributed, and its shape parameters are distance and propagation delay dependent. Then, the procedure for simulating the PDPs is given. In addition, the average PDP, root mean square delay spread and capacity extracted using the measured and simulated channels are compared to validate the accuracy of the proposed model. Finally, a measurement‐based channel simulator is developed by implementing an orthogonal frequency division multiplexing communication procedure on the simulated channel. These works can provide important information about the designs of the physical layer algorithms in small cells scenarios.