Open AccessEmulation of multistage interconnection networks by fibre memory
Author(s) -
Li ShuoYen Robert,
Tan Xuesong Jonathan,
Chen Peng,
Ho Siuting
Publication year - 2014
Publication title -
iet communications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.355
H-Index - 62
eISSN - 1751-8636
pISSN - 1751-8628
DOI - 10.1049/iet-com.2013.1122
Subject(s) - emulation , interconnection , computer science , multistage interconnection networks , computer network , parallel computing , distributed computing , computer architecture , economics , economic growth
A ‘fibre‐switch block’ is a switch with delay lines that feedback from some outputs to inputs. In every unit time, it receives and transmits a packet concurrently. A ‘fibre memory’ means a multi‐block serial connection. Its performance of time‐multiplexed operation is often said to ‘emulate’ a multistage interconnection network. This study formulates this concept of emulation. The formalised concept is useful in the design and validation of various switching functionalities, including timeslot interchanging, sorting, merging and concentration. For illustration, ‘banyan‐type networks’, ‘Clos network’ and several familiar multi‐stage sorting networks are all efficiently emulated.