Open AccessComparative analysis of network‐on‐chip simulation tools
Author(s) -
Khan Sarzamin,
Anjum Sheraz,
Gulzari Usman Ali,
Torres Frank Sill
Publication year - 2018
Publication title -
iet computers and digital techniques
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.219
H-Index - 46
eISSN - 1751-861X
pISSN - 1751-8601
DOI - 10.1049/iet-cdt.2017.0068
Subject(s) - network on a chip , computer science , scalability , computer architecture , latency (audio) , embedded system , throughput , energy consumption , engineering , telecommunications , operating system , electrical engineering , wireless
Network‐on‐chip (NoC) is a reliable and scalable communication paradigm deemed as an alternative to classic bus systems in modern systems‐on‐chip designs. Consequently, one can observe extensive multidimensional research related to the design and implementation of NoC‐based systems. A basic requirement for most of these activities is the availability of NoC simulators that enable the study and comparison of different technologies. This study targets the analysis of different NoC simulators and highlights its contributions towards NoC research. Various NoC tools such as NoCTweak, Noxim, Nirgam, Nostrum, BookSim, WormSim, NOCMAP and ORION are evaluated and their strengths and weaknesses are highlighted. The comparative analysis includes methods for estimation of latency, throughput and energy consumption. Further, the exemplary real world application, video object plane decoder is mapped on a 2D mesh NoC using different mapping algorithms under NOCMAP and NoCTweak simulators for comparative analysis of the NoC simulators and their embedded mapping algorithms.