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Predicting future complementary metal–oxide–semiconductor technology – challenges and approaches
Author(s) -
Aitken Robert,
Chandra Vikas,
Cline Brian,
Das Shidhartha,
Pietromonaco David,
Shifren Lucian,
Sinha Saurabh,
Yeric Greg
Publication year - 2016
Publication title -
iet computers and digital techniques
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.219
H-Index - 46
eISSN - 1751-861X
pISSN - 1751-8601
DOI - 10.1049/iet-cdt.2015.0210
Subject(s) - systems engineering , computer science , computer architecture , nanotechnology , engineering , engineering physics , materials science
Long timescales and complex design processes require that CPU architects and microarchitects have early access to information about future manufacturing processes. In some cases, this means that future technology must be predicted in advance of it actually being developed. In addition, close collaboration with the foundries, known as ‘Design‐Technology Co‐Optimisation’, or DTCO, allows the mutual influence during development of microarchitecture, physical IP (standard cells and memories), and process technology. This predictive technology, in conjunction with early technology information or not, allow design exploration in the form of trial runs of synthesis, place and route to determine the predicted effects of various technology choices on CPU power, performance, and area.

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