Design and evaluation of fine‐grain‐mode transition method based on dynamic memory access analysing for variable stages pipeline processor

This study proposes a fine‐grain‐mode transition method for variable stages pipeline (VSP) processor. The method is based on dynamic memory access analysing and it reduces energy consumption. A VSP processor varies the pipeline depth dynamically according to workload. When the workload is heavy, the processor shifts into a high‐speed mode that drives a deep pipeline at a high clock frequency. When the workload is light, the processor shifts into a low‐energy mode that unifies pipeline stages to make the pipeline shallower and drives it at a low clock frequency. The conventional mode transition method cannot follow sharp workload changes because it takes a long time to predict workload. The fine‐grain pipeline depth control, this study proposes, is based on a high‐speed workload prediction mechanism using memory access frequency, and it uses a novel method to conceal the overhead because of changing the pipeline depth. Simulation results show that the authors approach can reduce the energy‐delay product 10% below what it would be with the conventional approach.