Open AccessHybrid bidirectional transceiver for multipoint‐to‐multipoint signalling across on‐chip global interconnects
Author(s) -
Wary Nijwm,
Roy Chowdhury Antroy,
Mandal Pradip
Publication year - 2020
Publication title -
iet circuits, devices and systems
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.251
H-Index - 49
eISSN - 1751-8598
pISSN - 1751-858X
DOI - 10.1049/iet-cds.2019.0465
Subject(s) - transceiver , transmitter , interconnection , electronic engineering , electrical engineering , bandwidth (computing) , computer science , cmos , engineering , telecommunications , channel (broadcasting)
The authors propose a hybrid transceiver and an energy‐efficient link architecture for bidirectional multipoint‐to‐multipoint signalling across on‐chip global interconnect. The proposed link architecture eliminates the need for passive termination for bandwidth enhancement by means of active termination, reducing the required transmitter signalling current drastically and hence, improving the overall energy efficiency of the link. Also, compared to existing passive terminated interconnect with current‐mode receivers at all the points, the proposed link deploys low impedance current‐mode receivers providing active terminations at both the ends of the interconnect and high‐impedance voltage‐mode receivers, which do not consume any portion of the signalling current, at the intermediate nodes of the interconnect which further lowers the required transmitter signalling current. A mixed‐mode or hybrid transceiver architecture has been proposed for the aforementioned link, which can act either as a current‐mode transmitter or a current‐mode receiver or a voltage‐mode receiver. The architecture has been implemented in 0.18‐μm complementary metal oxide semiconductor technology for an interconnect of length 4 mm and having five transceiver nodes. The total energy efficiency of the architecture is 0.70 pJ/b for a speed of 3.0 Gb/s.