Open AccessMulti‐bit error control coding with limited correction for high‐performance and energy‐efficient network on chip
Author(s) -
Flayyih Wameedh N.,
Samsudin Khairulmizam,
Hashim Shaiful J.,
Ismail Yehea,
Rokhani Fakhrul Zaman
Publication year - 2020
Publication title -
iet circuits, devices and systems
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.251
H-Index - 49
ISSN - 1751-8598
DOI - 10.1049/iet-cds.2018.5282
Subject(s) - error detection and correction , computer science , hybrid automatic repeat request , energy consumption , forward error correction , energy (signal processing) , bit error rate , automatic repeat request , linear network coding , algorithm , real time computing , decoding methods , telecommunications , engineering , computer network , electrical engineering , mathematics , network packet , statistics , transmission (telecommunications)
In the presence of deep submicron noise, providing reliable and energy‐efficient network on‐chip operation is becoming a challenging objective. In this study, the authors propose a hybrid automatic repeat request (HARQ)‐based coding scheme that simultaneously reduces the crosstalk induced bus delay and provides multi‐bit error protection while achieving high‐energy savings. This is achieved by calculating two‐dimensional parities and duplicating all the bits, which provide single error correction and six errors detection. The error correction reduces the performance degradation caused by retransmissions, which when combined with voltage swing reduction, due to its high error detection, high‐energy savings are achieved. The results show that the proposed scheme reduces the energy consumption up to 51.7% as compared with other schemes while achieving the target link reliability level. Also, it shows improved network performance as compared with ARQ‐based scheme and close to forward error correction‐based schemes.