Open AccessEffective datapath logic extraction techniques using connection vectors
Author(s) -
Wang Yu,
Yeo Donghoon,
Shin Hyunchul
Publication year - 2019
Publication title -
iet circuits, devices and systems
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.251
H-Index - 49
ISSN - 1751-8598
DOI - 10.1049/iet-cds.2018.5083
Subject(s) - datapath , benchmark (surveying) , computer science , connection (principal bundle) , logic synthesis , computer architecture , macro , parallel computing , logic gate , algorithm , mathematics , programming language , geodesy , geography , geometry
Datapath macros are essential components of integrated circuits. The high regularity of datapaths allows compact layout design during placement. In some cases, datapath macros are manually pre‐designed and pre‐placed. However, datapath macros are frequently mixed with other circuits and they need to be extracted to capitalise on their regularity. In this study, the cells of a given circuit are accurately classified based on their size and pin information, and novel connection vectors to represent aspects of the connectivity among the cells have been proposed. By using the connection vectors of the cells, the similarity of connections is evaluated to extract potential datapath stages that constitute functional steps of a datapath. Two new efficient datapath logic extraction techniques (EDLETs) have been implemented based on the connection vectors for extracting potential datapaths in the circuit. One is the procedure‐based method, and the other is the machine learning‐based method. When compared with state‐of‐the‐art methods, the experiments show that both the procedure‐based and the learning‐based methods proposed in this study efficiently extract potential datapaths from the Modified International Symposium on Physical Design (MISPD) 2011 Datapath Benchmark Suite. The extraction results of the proposed EDLET can be forwarded to a datapath placement tool for placing datapaths with a regular structure.