
Generation of four states in MOSFET for future multivalued logic circuit design
Author(s) -
Karmakar Supriya
Publication year - 2019
Publication title -
iet circuits, devices and systems
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.251
H-Index - 49
ISSN - 1751-8598
DOI - 10.1049/iet-cds.2018.5027
Subject(s) - mosfet , computer science , electrical engineering , electronic engineering , mathematics , engineering , transistor , voltage
Analogue Quaternary logic is very promising logic for multi‐valued logic implementation. Four states can be generated in different ways. This paper shows the generation of four states in two different semiconductor MOSFETs by modifying their gate structure as well as channel structure. In three well‐spatial wave‐function switched FET (SWSFET), the four states are generated by connecting their drain terminals. On the other hand, in the quantum dot gate–spatial wave‐function switched FET (QDG‐SWSFET), the four states are generated by the combining effects of SWSFET and QDGFET.