Open AccessLinearisation technique for low‐voltage tuneable Nauta's transconductor in G m − C filter design
Author(s) -
Khumsat Phanumas
Publication year - 2018
Publication title -
iet circuits, devices and systems
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.251
H-Index - 49
eISSN - 1751-8598
pISSN - 1751-858X
DOI - 10.1049/iet-cds.2017.0177
Subject(s) - mosfet , triode , physics , cmos , electrical engineering , spurious free dynamic range , chebyshev filter , resistor , low voltage , inverter , electronic engineering , voltage , topology (electrical circuits) , engineering , transistor , optoelectronics
A low‐distortion, low‐voltage transconductor based on Nauta's inverter‐type transconductor is proposed. The transconductor's core MOSFETs are pushed into a strong inversion region under a low‐voltage supply utilizing a level shifter consisting of a linear resistor and a MOSFET current source. The transconductor's linearization relies on summing a decreasing G m characteristic with an increasing counterpart to obtain an overall flat G m characteristic. The non‐ideal decreasing G m is exploited from a non‐linear behaviour of the triode–MOS current source that restricts a | V GS | increment of the core strongly‐inverted MOSFET quartet while its increasing‐ G m counterpart found in another weakly‐inverted auxiliary MOSFET quartet. The MOSFET current source plays significant role in the linearization process where it has to be in a triode mode of either a strong, weak or moderate inversion region. Simulation results are provided to verify the feasibility of the proposed transconductor with a 5th‐order Chebyshev lowpass filter in a 0.18 µm CMOS process. The filter operates under a 0.5 V supply (the ratio V DD / V TH = 1.19) with a continuous bandwidth tuning from 500 kHz to 2.8 MHz. The proposed filter with a nominal 1.4 MHz bandwidth and a 430 mW power consumption renders the two‐tone SFDR of 64.9 dB.