Open AccessReal‐time unified architecture for forward/inverse discrete cosine transform in high efficiency video coding
Author(s) -
Abdelrasoul Maher,
Sayed Mohammed S.,
Goulart Victor
Publication year - 2017
Publication title -
iet circuits, devices and systems
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.251
H-Index - 49
ISSN - 1751-8598
DOI - 10.1049/iet-cds.2016.0423
Subject(s) - discrete cosine transform , computer science , coding (social sciences) , inverse , lapped transform , block (permutation group theory) , computer hardware , algorithm , transform coding , artificial intelligence , mathematics , image (mathematics) , statistics , geometry
In High Efficiency Video Coding (HEVC) standard, higher video resolutions employ larger integer Discrete Cosine Transform (DCT)/inverse DCT (IDCT) block sizes. In this study, the authors propose two high‐throughput unified DCT/IDCT architectures. The proposed architectures can process variable DCT/IDCT block sizes according to the HEVC standard. The proposed architectures were prototyped on TSMC 65 nm CMOS technology. The prototyping results show that the two unified architectures have throughput of 15.24 and 16.03 Gsps, respectively, and they can encode video sequences with resolutions up to 8 K at 120 fps and decode the same resolution at 240 fps using only one circuit for both DCT and IDCT.