Open AccessFully‐balanced four‐terminal floating nullor for ultra‐low voltage analogue filter design
Author(s) -
Kumngern Montree,
Khateb Fabian,
Kulej Tomasz
Publication year - 2017
Publication title -
iet circuits, devices and systems
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.251
H-Index - 49
eISSN - 1751-8598
pISSN - 1751-858X
DOI - 10.1049/iet-cds.2016.0212
Subject(s) - cmos , low voltage , electronic engineering , spice , voltage , electrical engineering , filter (signal processing) , transistor , electronic circuit , engineering , active filter , materials science
This study presents a new complementary metal–oxide–semiconductor (CMOS) structure for a fully balanced four‐terminal floating nullor (FBFTFN) which is suitable for ultra‐low‐voltage and low‐power applications. This structure employs a bulk‐driven quasi‐floating‐gate (BD‐QFG) metal–oxide–semiconductor transistor technique to provide the capability of ultra‐low‐voltage, low‐power operations as well as extended input voltage range. The functionality of the proposed circuits is demonstrated through simulations using SPICE and TSMC 0.18 µm n‐well CMOS technology with supply voltage of 0.5 V and dissipation power of 9.4 µW. To confirm the attractive features of the proposed circuit, the fully balanced filters such as band‐pass Sallen–Key filter, voltage‐mode universal biquadratic filter and current‐mode sixth‐order low‐pass filter using proposed BD‐QFG FBFTFN as active elements have been designed.