Open AccessSynthesis of recursive linear‐phase filters for fixed‐point hardware platforms
Author(s) -
Khorbotly Sami,
Hassan Firas,
Veillette Robert J.
Publication year - 2017
Publication title -
iet circuits, devices and systems
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.251
H-Index - 49
ISSN - 1751-8598
DOI - 10.1049/iet-cds.2016.0123
Subject(s) - linear phase , reset (finance) , finite impulse response , gaussian , field programmable gate array , computer science , infinite impulse response , filter (signal processing) , exponential function , fixed point , linear filter , gaussian filter , recursive filter , algorithm , digital filter , computer hardware , mathematics , control theory (sociology) , artificial intelligence , root raised cosine filter , mathematical analysis , physics , control (management) , quantum mechanics , financial economics , economics , computer vision , image (mathematics)
This study presents a methodology for recursive implementation of linear‐phase finite impulse response (FIR) filters in fixed‐point hardware platforms. The work uses a modified version of the switching and reset method to efficiently implement recursive linear‐phase exponential filters. An error analysis is presented that defines the upper error bounds resulting from the switching and reset implementation of the exponential filters in fixed‐point hardware. The exponential filters are then used as basis functions to synthesise other filters of interest. Gaussian filters are used as an example. The suggested recursive implementation delivers an accurate approximation of the Gaussian function. Unlike traditional techniques for implementing FIR filters, the hardware size of this recursive technique is O (1). In other words, increasing the order of a filter does not proportionally increase its hardware size. The results show that when implementing Gaussian filters on FPGAs, doubling the size of the filter, only increased the hardware size by an average of 6.12%.