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Efficient and low‐complexity hardware architecture of Gaussian normal basis multiplication over GF(2 m ) for elliptic curve cryptosystems
Author(s) -
Rashidi Bahram,
Sayedi Sayed Masoud,
Rezaeian Farashahi Reza
Publication year - 2017
Publication title -
iet circuits, devices and systems
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.251
H-Index - 49
ISSN - 1751-8598
DOI - 10.1049/iet-cds.2015.0337
Subject(s) - finite field , exponentiation , multiplier (economics) , normal basis , elliptic curve cryptography , gf(2) , polynomial basis , field programmable gate array , multiplication (music) , mathematics , binary number , cryptosystem , gaussian , computer science , arithmetic , discrete mathematics , algorithm , cryptography , computer hardware , encryption , public key cryptography , combinatorics , physics , galois theory , mathematical analysis , quantum mechanics , economics , macroeconomics , operating system
In this paper, an efficient high‐speed architecture of Gaussian normal basis (GNB) multiplierover binary finite field GF(2 m ) is presented. The structure is constructed by using some regular modules for computation of exponentiation by powers of 2 and low‐cost blocks for multiplication by normal elements of the binary field. For the powers of 2 exponents, the modules are implemented by some simple cyclic shifts in the normal basis representation. As a result, the multiplier has a simple structure with a low critical path delay. The efficiency of the proposed multiplier is examined in terms of area and time complexity based on its implementation on Virtex‐4 field programmable gate array family and also its application specific integrated circuit design in 180 nm complementary metal–oxide–semiconductor technology. Comparison results with other structures of the GNB multiplier verify that the proposed architecture has better performance in terms of speed and hardware utilisation.

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