Open AccessBuilt‐in self‐test structure for fault detection of charge‐pump phase‐locked loop
Author(s) -
Xia Lanhua,
Wu Jianhui,
Huang Cheng,
Zhang Meng
Publication year - 2016
Publication title -
iet circuits, devices and systems
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.251
H-Index - 49
ISSN - 1751-8598
DOI - 10.1049/iet-cds.2015.0224
Subject(s) - phase locked loop , charge pump , fault coverage , built in self test , digital pattern generator , fault detection and isolation , fault (geology) , phase frequency detector , electronic engineering , computer science , engineering , voltage , electrical engineering , jitter , electronic circuit , seismology , actuator , geology , capacitor
A defect‐oriented built‐in self‐test (BIST) structure of charge‐pump phase‐locked loop (CP‐PLL) for high fault coverage and low area overhead test solution is proposed. It employs a new structure of phase/frequency detector, a D flip‐flop and some existing blocks in the PLL as the input stimulus generator and fault feature extracted devices for testing evaluation. Thus, no extra test stimulus or high‐performance measured instruments are required for test. The structure is easily implemented and has a little influence on the performance of CP‐PLL. Fault simulation results indicate that the proposed BIST structure has high fault coverage (98.75%) and low area overhead (0.78%).