
Low‐power amplitude modulator for wireless application using underlap double‐gate metal–oxide–semiconductor field‐effect transistor
Author(s) -
Mukherjee Sagar,
Koley Kalyan,
Dutta Arka,
Kumar Sarkar Chandan
Publication year - 2016
Publication title -
iet circuits, devices and systems
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.251
H-Index - 49
eISSN - 1751-8598
pISSN - 1751-858X
DOI - 10.1049/iet-cds.2015.0212
Subject(s) - bandwidth (computing) , transistor , wideband , optoelectronics , physics , field effect transistor , electrical engineering , materials science , electronic engineering , engineering , voltage , telecommunications
In this study, a design guideline for a modified low‐power wideband on‐chip amplitude modulator (AM) based on independently driven double‐gate metal–oxide–semiconductor field‐effect transistor (IDDGMOS) is proposed. The AM performance is then analysed for three different types of underlap engineered IDDGMOS devices. It is observed that the modulator designed with IDDGMOS presents a higher gain and bandwidth for lower power input signals. For analysing the gain–bandwidth performance of the modulator circuit, a small signal model for the devices is considered. The linearity and noise performance of the modulator circuit for different IDDGMOS structures is analysed by studying the 1 dB compression point and the signal‐to‐noise ratio. The analysis suggested that the most efficient AM circuit performance is achieved for the symmetric underlap IDDGMOS device. The symmetric underlap IDDGMOS AM circuit yields a gain of 11 dB, a bandwidth of 5.5 GHz and a 47.2% efficiency with a distortion less input signal power range of −60 to −33.5 dB. Moreover, the reduced power loss is about 0.047% of the power loss obtained for the conventional complementary metal–oxide–semiconductor device, whereas the bandwidth of the circuit almost triplicates.