Open AccessCompact noise modelling for common double‐gate metal–oxide–semiconductor field‐effect transistor adapted to gate‐oxide‐thickness asymmetry
Author(s) -
Sharan Neha,
Mahapatra Santanu
Publication year - 2016
Publication title -
iet circuits, devices and systems
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.251
H-Index - 49
eISSN - 1751-8598
pISSN - 1751-858X
DOI - 10.1049/iet-cds.2015.0128
Subject(s) - asymmetry , materials science , gate oxide , field effect transistor , oxide , noise (video) , optoelectronics , transistor , metal , metal gate , electrical engineering , physics , engineering , computer science , metallurgy , quantum mechanics , voltage , artificial intelligence , image (mathematics)
On the basis of the quasi‐linear relationship between the surface potentials of a common double‐gate metal–oxide–semiconductor field‐effect transistor, a compact noise model, which is adapted to gate‐oxide‐thickness asymmetry, is proposed. The proposed model includes a physics‐based thermal and flicker noise model. The effect of the lateral and vertical electric fields on the mobility degradation has also been taken into account for accurate noise prediction in short‐channel devices. The thermal noise model is compared with the technology computer aided design (TCAD) simulation data and good agreement is observed. The proposed noise model appears to be efficient for analogue circuit simulation.