Open AccessCommon‐rail powered reliability improving technique for single‐supply complementary metal oxide semiconductor amplifiers
Author(s) -
Roy Apratim,
Rashid Muhammad
Publication year - 2015
Publication title -
iet circuits, devices and systems
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.251
H-Index - 49
eISSN - 1751-8598
pISSN - 1751-858X
DOI - 10.1049/iet-cds.2013.0401
Subject(s) - reliability (semiconductor) , amplifier , electrical engineering , materials science , computer science , engineering , cmos , physics , power (physics) , quantum mechanics
This paper presents a low‐power technique to improve reliability of complementary metal oxide semiconductor (CMOS) amplifiers using a shared bias network for input gate and substrate of transistors. The circuit [named reliability improving circuit (RIC)] significantly reduces discrepancy in amplifier gain ( S 21 , voltage gain), noise figure (NF/NF min ) and output reflection‐loss (ORL) parameters resulting from variation in threshold voltage, feature‐width, device speed and supply rail. It performs well on both typical‐ (1.2 V) and low‐voltage (0.7 V) platforms of a 90 nm CMOS technology and is able to maintain its consistency within a wide frequency coverage (10–30 GHz) for three different architectures (cascode, low‐voltage cascode and common‐source). This allows the RIC incorporated front‐end to satisfy a broad range of gain, isolation, linearity and NF requirements. The scheme's biasing arrangement is powered from amplifier rails which permit the overall circuit to be driven from a single main supply. Analysis and simulation results demonstrate the technique improving consistency of figures of merit considerably against different aspects of process/system variation without significant degradation of radio frequency performance.