Open AccessHigh frequency CMOS amplifier with improved linearity
Author(s) -
Tanseer Ali M.,
Wu Ruiheng,
Mao Luhong,
Callaghan Peter,
Rapajic Predrag
Publication year - 2014
Publication title -
iet circuits, devices and systems
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.251
H-Index - 49
ISSN - 1751-8598
DOI - 10.1049/iet-cds.2013.0327
Subject(s) - linearity , amplifier , electronic engineering , cmos , frequency compensation , rf power amplifier , radio frequency , automatic gain control , computer science , electrical engineering , engineering , telecommunications
In this paper, a novel amplifier linearisation technique based on the negative impedance compensation is presented. As demonstrated by using Volterra model, the proposed technique is suitable for linearising amplifiers with low open‐loop gain, which is appropriate for RF/microwave applications. A single‐chip CMOS amplifier has been designed using the proposed method, and the simulation results show that high gain accuracy (improved by 38%) and high linearity (IMD 3 improved by 14 dB, OIP 3 improved by 11 dB and adjacent channel power ratio (ACPR) improved by 44% for CDMA signal) can be achieved.