Open AccessDesign of energy‐efficient circuits and systems using tunnel field effect transistors
Author(s) -
Mukundrajan Ravindhiran,
Cotter Matthew,
Bae Sungmin,
Saripalli Vinay,
Irwin Mary Jane,
Datta Suman,
Narayanan Vijaykrishnan
Publication year - 2013
Publication title -
iet circuits, devices and systems
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.251
H-Index - 49
eISSN - 1751-8598
pISSN - 1751-858X
DOI - 10.1049/iet-cds.2012.0387
Subject(s) - cmos , computer science , adder , efficient energy use , transistor , electronic circuit , field effect transistor , circuit design , abstraction , mobile device , field (mathematics) , electronic engineering , embedded system , electrical engineering , engineering , voltage , philosophy , mathematics , epistemology , pure mathematics , operating system
Energy efficiency is considered to be the most critical design parameter for ubiquitous and mobile computing systems. With consumers expecting improved functionality and performance from these systems without compromising on battery life, there is urgent need to explore emerging technologies that can overcome the limitations of CMOS and deliver greater energy efficiency. The potential of one such prospective metal oxide semiconductor field effect transistor replacement device, the tunnel FET (TFET), is evaluated in this study. Novel circuit designs are presented to overcome unique design challenges posed by TFETs. Further, the impact of TFETs at different levels of design abstraction is characterised by evaluating a novel sparse prefix tree adder and a field programmable gate array. A considerable improvement in delay and significant reduction in energy is observed because of the combined impact of circuit and technology co‐exploration.