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Transient voltage stresses in MMC–HVDC links – impulse analysis and novel proposals for synthetic laboratory generation
Author(s) -
Freye Claudius,
Wenig Simon,
Goertz Max,
Leibfried Thomas,
Jenau Frank
Publication year - 2018
Publication title -
high voltage
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.732
H-Index - 20
ISSN - 2397-7264
DOI - 10.1049/hve.2017.0141
Subject(s) - voltage , impulse (physics) , transient voltage suppressor , transient (computer programming) , high voltage direct current , hvdc converter , modular design , engineering , electronic engineering , computer science , direct current , electrical engineering , transformer , physics , quantum mechanics , operating system
To evaluate and optimise insulation coordination concepts for state of the art high‐voltage direct current (HVDC) transmission systems, appropriate test voltage shapes are required for laboratory imitation of occurring stresses. While especially transient voltages in the monopolar modular multilevel converter (MMC)–HVDC links show an extensive deviation from commonly applied switching impulse shapes, this study focusses on the analysis of over‐voltages subsequent to direct current pole to ground faults. Additionally, novel methods for synthetic laboratory test voltage generation are proposed. Based on simulated transients occurring during fault scenarios in different symmetrical monopolar ±320 kV MMC–HVDC schemes, curve fitting, and related analysis techniques are used in order to compare simulated over‐voltages with standard test voltage shapes. Moreover, these techniques further allow the identification of novel relevant impulse characteristics. Subsequently, design considerations for the generation of non‐standard impulses based on single‐stage circuits are derived and discussed. Those synthetically generated voltages may, later on, provide the basis for future investigations on related dielectric effects caused by those non‐normative over‐voltages.

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