In‐memory calculation with embedded arithmetic and logic units for deep neural network | Zendy

Yu Shuiyue | Zendy; Fu Jie | Zendy; Lin Zhiting | Zendy; Peng Chunyu | Zendy; Wu Xiulong | Zendy

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In‐memory calculation with embedded arithmetic and logic units for deep neural network

Author(s) -

Yu Shuiyue,

Fu Jie,

Lin Zhiting,

Peng Chunyu,

Wu Xiulong

Publication year - 2022

Publication title -

electronics letters

Language(s) - English

Resource type - Journals

SCImago Journal Rank - 0.375

H-Index - 146

eISSN - 1350-911X

pISSN - 0013-5194

DOI - 10.1049/ell2.12549

Subject(s) - arithmetic , artificial neural network , computer science , arithmetic logic unit , arbitrary precision arithmetic , saturation arithmetic , mathematics , artificial intelligence

The computation of multiplication in memory is a promising approach to reduce latency and improve the energy efficiency of intelligence edge processors. However, the multiplication operation in the analog domain is associated with complex peripheral circuits and low accuracy. In this letter, an static random‐access memory (SRAM) array with embedded low area cost arithmetic and logic units is proposed, which realizes high‐speed and high‐precision multi‐bit multiplication. The calculation delay is as low as 164 ps. The maximum integral non‐linearity (INL) is only 0.340 least significant bit, which is 1/16 of that of analog domain multiplication.

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